Since www.linux-mips.org is down. (EDIT: they were moving to new hardware, up now)
R4000 (1991) First 64bit MIPS CPU. SGI bought the design to ensure it would come to market.
R4400 (1992) Doubled I+D cache to 16KB
— snip snip snip —
R10000 (1995) Main feature: OOO Execution, 32KB I+D L1 cache (R8000 had half that), apparently cheaper than competition with similar performance.
R12000 (1998) Faster R10000, eventually die shrunk.
R14000 (2001) Now runs at 600MHz, supports DDR SRAM in off-chip cache, SysAD bus (whatever that is) now at 200MHz.
R16000 (2002) 64KB I+D L1 cache, supports up to 8MB L2 cache, 700MHz and above.

R10000 family memory coherency issues
The R10000 features aggressive out of order execution including speculative execution of loads and stores. On systems with coherent I/O this does not pose a problem. On non-coherent systems this will cause serious memory corruption. Linux therefore currently does not support these systems. Affected systems are the Indigo 2 R10000 and all SGI O2 with R10000 family processors.
The issue exists in all R10000 family processors. R12000 and newer implement mode bit which faciliates a more efficient workaround but for unknown reasons this feature is not being used in the O2.

Quoted cuz I don’t know what it’s talking about. That’s probably why the Octane and above aren’t supported in Linux.

Going by SPECint and SPECfp numbers, I’d say the R12000 at 350MHz is around 55% the integer performance and 85% the floating point performance of a Pentium 3 1GHz. Not very impressive, actually. I’m having second thoughts about this. The R10000, which tops out at 250MHz, could only be equivalent to a P3 500. Great IPC, but still.